1. Technical Field
The present invention relates to an analog-digital converter, an analog-digital conversion method, an image pickup device, a method of driving the image pickup device, and a camera. More particularly, the invention relates to an analog-digital converter and an analog-digital conversion method converting an analog value into a digital value by converting the analog signal with time, an image pickup device having the analog-digital converter, a method of driving the image pickup device, and a camera having the analog-digital converter.
2. Related Art
FIG. 13 is a diagram schematically illustrating a known CMOS image sensor, where the CMOS image sensor includes a pixel array section 202, a vertical scanning circuit 203, a column signal processor 204, and a horizontal scanning circuit 206 (for example, see JP-A-10-126697).
Here, the pixel array section 202 has a configuration in which plural pixels 201 each having a photoelectric conversion element are arranged in a matrix. The vertical scanning circuit 203 selects the pixels of the pixel array section 202 every row and controls a shutter operation or a reading operation of each pixel.
The column signal processor 204 reads signals from the pixel array section 202 every row and performs a predetermined signal process every column.
The horizontal scanning circuit 206 is configured to select the signals of the column signal processor every row and to guide the selected signals to a horizontal signal line 205. The signals from the horizontal signal line 205 are converted into an intended output format by a data signal processor (not shown).
Electrical signals corresponding to signal charges are sequentially read from the respective pixels 201 of the pixel array section 202. That is, a method of allowing an analog-to-digital converter (ADC) to convert the analog electric signals read from the pixels 201 into digital signals is generally employed.
An example of a known ADC is described now with reference to the drawings.
A known ADC 301 shown in FIG. 14 includes a counter clock supply line 302, a comparator 304, and a counter 305.
Here, a counter clock is supplied to the counter clock supply line 302. A digital-analog converter (DAC) 303 is connected to the counter clock supply line 302. The comparator 304 is connected to the DAC 303 and the counter 305 is connected to the comparator 304 and the counter clock supply line 302.
A counter clock (see “COUNTER CLOCK” in FIG. 15) is input to the DAC 303 via the counter clock supply line 302. The DAC is configured to output a ramp wave (analog signal) whose output value decreases at a constant ratio at a rising time or a falling time of the counter clock (see “DAC OUTPUT (RAMP WAVE)” in FIG. 15). The ramp wave output from the DAC 303 is commonly supplied to all the comparators 304.
A pixel output (see “PIXEL OUTPUT VALUE” in FIG. 15) which is an analog signal read from the pixel array section 202 (pixels 201) and the ramp wave are input to the comparators 304. The comparators are configured to output a high-level (H-level) signal when the pixel output and the ramp wave satisfy a relation of “(ramp wave)>(pixel output)” and to output a low-level (L-level) signal when the pixel output and the ramp wave satisfy a relation of “(ramp wave)<(pixel output)” (see “COMPARATOR OUTPUT” in FIG. 15).
The counter 305 is a DDR (Double Data Rate) counter and is configured to perform a counting operation at both the rising time and the falling time of the input counter clock (see “COUNTER OUTPUT” in FIG. 15). The counter 305 stops the counting operation at a time point when the output signal of the comparator 304 becomes a L level.
The ADC having the above-mentioned configuration stops the count at a time point when the output of the comparator is inverted from the H-level signal to the L-level signal, that is, at a time point when the ramp wave becomes smaller than the pixel output. The ADC outputs the counted value as a digital value of the pixel output at that time and can convert the analog signal (pixel output) into the digital value (counted value) by converting the pixel output (electrical signal) with time.
Specific description is made now with reference to FIG. 16. Here, reference sign V represents the pixel output (analog value) and reference sign L represents the waveform of the ramp wave.
In the ADC having the above-mentioned configuration, the count value of an intersection P (at the time point when the output values are equal) of the ramp wave output from the DAC and a reset level is determined to convert the reset level of the pixels into a digital value. The count value of an intersection D (at the time point when the output values are equal) of the ramp wave output from the DAC and a signal level is determined to convert the signal level of the pixels into a digital value.
In this way, the pixel output (electrical signal) is converted with time and the analog value (pixel output) is converted into a digital value (count value).
Here, in the known ADC, the output waveform (ramp wave) of the DAC does not depend on the pixel output but is always constant. That is, even at any pixel output value, a period of time (a P-phase reading period) necessary for converting the reset level into the digital value and a period of time (D-phase reading period) necessary for converting the signal level into the digital value are constant.